Cadence Launches Maestro AI Model Family for Chip Design With On-Premise Deployment

Cadence Design Systems (CDNS-US) unveiled its Maestro series of AI models on October 26, enabling engineers to design chips and electronic systems, with customers able to run the models on Cadence's cloud, public cloud, or their own data centers behind corporate firewalls. First models are expected to reach select customers in the fourth quarter of 2026. Maestro uses AI agents to interpret design goals, break down tasks, operate EDA tools and analyze results, feeding evaluation data back into model training so the AI adjusts decisions to engineering constraints rather than merely generating text or code. Customers can fine-tune models on their own data, chip designs and workflows. Cadence said internal testing showed design quality-of-results improvements of up to 30% and up to 5x better token efficiency versus general-purpose foundation models. Some Maestro models use Nvidia's open-weight Nemotron and integrate the OpenShell security architecture, though not exclusively Nvidia models. Senior vice president Paul Cunningham said Maestro is not tied to a single model vendor, contrasting with Synopsys' GPT-Synopsys partnership with OpenAI announced September 30.