Nvidia Said to Cut Rubin HBM4 Bandwidth Specs by 13% to 26%, Shifts Rubin Ultra to 8-Layer Stacks

Nvidia has quietly lowered memory bandwidth specifications for its next-generation AI accelerator platforms and revised Rubin Ultra's memory architecture, according to reports from ZDNet and Wccftech citing archived versions of Nvidia's official specification pages. Per-GPU HBM4 bandwidth for Rubin was cut to 19.2 TB/s from 22 TB/s in a Sept. 1 version, a roughly 13% reduction. NVLink 6 throughput fell to 3 TB/s from 3.6 TB/s, down about 17%, while system-level bandwidth for the HGX Rubin NVL8 drops as much as 26%. Vera CPU memory is now listed at "up to 1.5 TB LPDDR5X" per chip rather than a fixed figure. Rubin Ultra, originally planned around 12-layer HBM4E stacks, may instead use a mix of 8-layer HBM4 and HBM4E following thermal and yield difficulties, with discussions intensifying in the third quarter. TrendForce said fewer DRAM dies per stack lower cost and GPU bill-of-materials while supporting more GPUs per HBM bit, positioning 8-layer HBM4 as a preferred option in 2027. The lower bandwidth threshold also widens the pool of qualified HBM4 suppliers.